Kingston Auto Temp DDR3L SDRAM
Kingston Auto Temp DDR3L SDRAM memory devices feature double-data-rate architecture and 8-bit prefetch pipelined design for high-speed, dual data transfers per clock cycle. These 2G/4Gbit density DDR3L SDRAMs, with 16M/32M words x 16 bits x 8 banks organization, are available in RoHS-compliant and Halogen-free 96-ball FBGA packages. These devices are designed to meet the needs of applications that require an extended automotive operating temperature range of -40°C to 105°C. Typical applications include automotive, industrial IoT / robotics, factory automation, and 5G networking/telecommunications communication modules.Features
- Double-data-rate architecture: two data transfers per clock cycle
- The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture
- Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver
- DQS is edge-aligned with data for READs, center-aligned with data for WRITEs
- Differential clock inputs (CK and /CK)
- DLL aligns DQ and DQS transitions with CK transitions
- Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS
- Data mask (DM) for write data
- Posted /CAS by programmable additive latency for better command and data bus efficiency
- On-Die-Termination (ODT) for better signal quality:
- Synchronous ODT
- Dynamic ODT
- Asynchronous ODT
- Multi-Purpose Register (MPR) for pre-defined pattern read-out
- ZQ calibration for DQ drive and ODT
- Automatic Self-Refresh (ASR)
- /RESET pin for Power-up sequence and reset function
- SRT range - Normal/extended
- Programmable Output driver impedance control
Specifications
- 2G/4G bits density
- Organization:
- 16Mwords x 16bits x 8banks
- 32Mwords x 16bits x 8banks
- Package:
- 96-ball FBGA
- Lead-free (RoHS compliant) and Halogen-free
- Power supply: 1.35V (typical)
- VDD, VDDQ = 1.283V to 1.45V
- Backward compatible for VDD, VDDQ=1.5V to 0.075V
- Data rate:
- 2133Mbps/1866Mbps/1600Mbps/1333Mbps (maximum)
- Backward compatible
- 2KB page size:
- Row address: A0 to A13
- Column address: A0 to A9
- Eight internal banks for concurrent operation
- Burst Lengths (BL): 8 and 4 with Burst Chop (BC)
- Burst Type (BT):
- Sequential (8, 4 with BC)
- Interleave (8, 4 with BC)
- Programmable /CAS (Read) Latency (CL)
- Programmable /CAS Write Latency (CWL)
- Precharge: auto precharge option for each burst access
- Driver strength: RZQ/7, RZQ/6 (RZQ = 240Ω)
- Refresh:
- auto-refresh
- self-refresh
- Refresh cycles:
- Average refresh period
- 7.8µs at -40°C ≤ Temperature ≤ 85°C
- 3.9µs at 85°C ≤ Temperature ≤ 105°C
- Operating Case temperature range:
- 0°C to 95°C (commercial temperature)
- -40°C to 95°C (industrial temperature)
- -40°C to 105°C (automotive temperature)
View Results ( 2 ) Page
| Teilnummer | Datenblatt | Beschreibung |
|---|---|---|
| D1216ECMDXGMEY-U | ![]() |
DRAM Auto temp 2Gb 128Mx16 96 ball FBGA DDR3L 2133 |
| D2516ECMDXGMEY-U | ![]() |
DRAM Auto temp 4Gb 256Mx16 96 ball FBGA DDR3L 2133 |
Veröffentlichungsdatum: 2024-07-01
| Aktualisiert: 2025-04-03

