In addition to the DDC blocks, the AD969x ADCs offer several functions to simplify the Automatic Gain Control (AGC) function in the communications receiver. The programmable threshold detector enables monitoring of the incoming signal power using the fast-detect output bits of the ADC. Using the low-latency threshold indicator, designers can quickly turn down the system gain to avoid an overrange condition at the ADC input. Designers can configure the Subclass 1 JESD204B-based high-speed serialized output in a variety of one-, two-, four- or eight-lane configurations. The SYSREF± input pins support multiple device synchronization.